Home Tech Library Two Obstacles, Challenges and Solutions for Advanced Packaging in Automotive Reliability

Two Obstacles, Challenges and Solutions for Advanced Packaging in Automotive Reliability

Home Tech Library Two Obstacles, Challenges and Solutions for Advanced Packaging in Automotive Reliability

Two Obstacles, Challenges and Solutions for Advanced Packaging in Automotive Reliability

by ruby

Issued Date: 2019/4/25
Issued By: iST

The popularization of IoV is just around the corner as the developing communication standards of V2X and 5G, which also gives rise to advanced IC packaging technologies including SiP, MCM, and Fan-in/Fan-out.
What challenges will the automotive electronics reliability face? Is there any solution?

With the development of Internet of vehicles (IoV), advanced automotive electronics products have become the main trend of development in recent years, and grab the semiconductor industry’s attention. Hence, the Advanced Driver Assistance Systems (ADAS) that were just a concept a few years ago are now a reality.

In the traditional automotive industry, new technologies are seldom adopted by hot-selling models. Instead, the latter would most likely feature the most mature and reliable products. Reliability has constantly been a top concern for automotive electronics. On top of this, with IoV and AI technologies being growingly incorporated in automotive IC, performance is also becoming an important consideration, which is bringing changes to IC design.

Semiconductor chips have been housed in BGA, QFP and SOP packages, which are mature packaging technologies but have difficulty meeting the demand of new-generation IoV communication standards such as AI, HPC,C-V2X(Cellular V2X) and DSRC(Dedicated Short Range Communication) for transmission speed. This gives rise to advanced packaging technologies including Multi-Chip Module (MCM), System in Package (SiP) and Fan-in/Fan-out, which can expect to become the prevailing trend but will also have to stand the test of quality, safety and reliability.

The automotive industry has established comprehensive standards on quality and safety. IATF 16949 sets the requirements for an Automotive Quality Management System (QMS). Compliance to VDA 6.3 is mandated by some European automakers. For the mass production phase, new IECQ Automotive Qualification Program (AQP) gives the automotive industry a standardized way of testing components to ensure quality. ISO 26262 specifies functional safety of electrical and/or electronic systems in production automobiles. (Read on: Enter Supply Chain of AI Smart Car in Five Steps of International Auto Reliability Specs)

As to reliability, it has to be evaluated respectively on “2R level”, which are the Component Level Reliability (CLR) and the Board Level Reliability (BLR), each of which represents a step in the IC packaging process. If a semiconductor chip can pass reliability tests for these two levels, it can be used in an automobile. iST tech classroom this month is to address the challenges and the solutions for the advanced packaging in CLR and BLR.

  • 1. Three Challenges for Advanced Packaging in CLR

    Automotive Electronics Council (AEC) has defined common electrical component qualification requirements in automotive applications. AEC-Q100 for integrated circuits, AEC-Q101 for discrete semiconductors, AEC-Q102 for discrete optoelectronic semiconductors and AEC-Q200 for passive components (refer to image 1). Automotive components to qualify for these standards must pass heat dissipation, material warpage and sequential stress tests.

    AEC-Q series

    Image 1:AEC-Q series

    (1) Heat Dissipation

    In the harsh automotive environment, “heat” has always been the biggest challenge in reliability. Today’s automotive systems demand high-performance components that inevitably have high current consumption, which brings even more challenges to component reliability. As such, developers strive to strike a perfect balance between performance and power consumption.

    (2) Warpage

    Another common and serious problem with automotive components is IC package warpage. To keep up with the demand for high-speed data transmission, automotive semiconductor chips are growingly packaged in MCM/SiP assembly, instead of BGA. However, an MCM package combines a mix of multiple chips, active and passive components and PCB with different thermal expansion coefficients (CTE) integrated in a module so it is susceptible to warpage and deformation in an automotive environment with drastic temperature changes. Such a problem plagues not only IC components but also print circuit boards (PCB).

    High frequency is now a common design in automotive systems and will become a fundamental design in the 5G era. High frequency systems require PCB made with a special material of which the thermal expansion coefficient (CTE) may be four times higher when its temperature over glass transition temperature (Tg) and resulting in severe package warpage.

    (3) Sequential Stress Tests

    Last but not least, more challenges arise from new AEC-Q104 (Read on: Six Key points to Learn the AEC-Q104 for Automotive MCM), highlighting sequential stress tests, which AEC has been applying to modules for years and has extended to components beginning 2018. AEC established AEC-Q104 in consideration of the fact that automotive systems in real-world use scenarios are subject to a series of conditions and therefore automotive systems and their components must be able to cope with a set of sequential environment tests.

    In the past, chips were packaged individually with simple material composition and assembly structure so they could be tested one by one. Today, advanced packaging, such as MCM and SiP, integrates different types of chips with varying characteristics, which may fail in an automotive environment when a series of conditions happen. AEC-Q104 specifies that chips must pass each step in a sequence of reliability tests.

    For example, high-temperature operating life (HTOL) and thermal shock tests used to be conducted separately. AEC-Q104 requires that chips undergo an HTOL test followed by a thermal shock test and they must pass both to be considered compliant. This not only makes testing more time-consuming but also incredibly challenging. Although AEC-Q104 compliance is not mandatory at present, most automakers do require their components to meet AEC-Q104 standards. Accordingly, it is important for suppliers looking to expand into the automotive sector to obtain AEC-Q104 certifications for their products.

  • 2. The Challenge for Advanced Packaging in BLR

    (1) Warpage

    Advanced packaging technologies such as MCM, SiP, and Fan-in/Fan-out, stacking two or more chips with different functions by vertical laser ray through silicon via (TSV). However, this kind of package combines a mix of multiple chips and components with different thermal expansion coefficients (CTE) is susceptible to a warpage in an automotive environment with drastic temperature changes. Moreover, the improper materials may result in severe warpage and lead to bonding abnormalities of the subsequent SMT process.

    In addition, the application of 5G technology is also one of challenges for the high frequency PCB. The designer must not only consider the factors of signal attenuation, but also the warpage happens in the high-temperature environment.


    Image 2: A warpage may happen both on component and PCB, resulting in the low quality of SMT.

    An abnormal warpage could cause a great discrepancy between the result and the expected one of reliability test. The traditional approach is to come up with an initial PCB design based on the specifications and then make adjustments on the fly until a usable version is available, which consumes tremendous time and effort.

  • 3. The Solution for Advanced Packaging in Automotive Reliability

    It can be concluded from the above that the warpage, which is the common problem for automotive advanced packaging in both CLR and BLR. To ensure good soldering quality in SMT process, so as to avoid the impact of poor soldering quality on reliability verification result and the unnecessary cost. iST has implemented the warpage measuring equipment especially for component and PCB before performing the SMT (refer to image 3).


    Image 3: Through the simulation software, the warpage situation of component and PCB can be known before performing the SMT.

    In addition, iST has worked with US-based DFR Solutions (DFR) to design PCB simulation software. DFR is a renowned consulting firm in the automotive sector. Its Sherlock Automated Design Analysis™ software has been adopted by leading American and European automakers. iST makes use of the massive data accumulated by Sherlock in the past and is able to find stress parameters in all kinds of applications such that PCB design can closely match real use conditions(refer to image 4). Sherlock serves as a tool to analyze materials’ thermal expansion coefficients (CTE), malleability and response to external stress prior to reliability tests. It can also work with widely-used computer-aided engineering (CAE) tools to significantly reduce the time it takes to conduct analyses.


    Image 4: Risks that may arise from the product can be known before testing by a prior knowledge of the stress distribution and deformation quantity of product through the CAR software.

ADAS are enjoying a rapid rise in popularity beginning in 2018, spurring new opportunities for the semiconductor industry. Technology firms in Taiwan are gearing up toward automotive electronics development. As automotive systems are quite different from consumer electronics in terms of design thinking, industry ecosystem, requirement standards and particularly test procedures, iST has many years of experience in automotive electronics testing and can guide Taiwan firms in the right R&D direction, shorten time-to-market and help them build up competitive edge.

This article is aimed to share our experiences with honorable clients like you. In case you want to know more details, please call Mr. Daniel Chuang at +886-3-579-9909 Ext. 6406 or email: web_BLR@istgroup.com