IC products packaged with WLCSP (Wafer-level chip scale package) are confronted with two big challenges in FIB circuit edit. Most parts of circuits of an IC are covered by the bumps and the RDLs (redistribution layer) and cannot be edited. Even if there are circuits not covered by the bumps and RDLs, as the organic passivation on top is thicker, greater effort and more time is needed to edit these circuits.
The Superiority of iST
With specific preprocessing methods, site 1~3 can be achieved FIB circuit edit without problems.
Perform complex circuit edit under solder ball and organic layer then replant whole new solder ball.
Remove partial solder ball and perform circuit edit without re-planting them back to speed-up the time to market.