(Photo courtesy: Akrometrix)
Warpage Measurement is performed by generating the Moire pattern distribution diagram based on the geometric interference between the reference gratings and their shadows on the samples and calculating the relative vertical displacement in each pixel position. This may be used to simulate SMT reflow temperature and operating environment conditions while logging the entire warpage displacement cycle.
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It’s better to get the component and PCB warpage relevant data before SMT. With warpage measurement relevant equipment, the iST BLR lab can simulate warpage suffered by the component and PCB to change SMT parameter settings and ensure soldering quality in the SMT process to prevent reliability test failure and wasted costs.
The Superiority of iST
It took just a short time to complete the warpage measurement and get the warpage amount of component and PCB respectively. It may also simulate the environment condition for subsequent reliability test to help customers observe the product’s warpage, deformation or even fracture resulted from temperature, and enables to perform product’s life analysis and prediction with related software.
Case Sharing
Simulate and analyze components and PCBs before SMT to learn about warpage in advance (courtesy of Akrometrix).
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