EOS (electrical overstress)/ESD (Electrical Static Discharge) becomes a key factor in the Return Merchandise Authorization (RMA). The lower tolerance to EOS, the damage risk of IC is higher. Besides requiring IC suppliers to perform ESD verification of finished products according to the specified level. End product manufacturers focus more on ESD reliability of the selected ICs.
What iST can do for you?
iST provides “Testing to Fail” test and failure analysis reports. These approaches provide for understanding over IC weak points and ESD sustainability, which can be further referenced in system design, IC design adjustment and RMA failure analyses.
- Human Body Mode Test
- Machine Mode Test
- Charged Device Mode Test
- Socket -Charge Device Mode Test
- Latch-up Test
- Transient-Induced Latch up Test
- ESD Gun Test
- ESD I-V Curve measurement
- Electrical Overstress Test
Failure Mode
Failure Judgment: Voltage shift over ±30% at reference point.
OM image of IC weak points after EOS test
The Superiority of iST
- Profound ESD test experience: provide effective test solution to identify product error at ease
- Fast delivery: 3-shift, 24 hours operation
- Test results accuracy: electrostatic test equipment with in-house developed equipment maintenance mechanism to ensure equipment output with regular inspection. This may help customer get accurate test results and minimize test results variance due to invalid equipment output.
Reference Specification
- MIL-STD (US military standard)
- EIA/JEDEC (Japanese regulations on protection against electrostatic discharge)
- AEC (Automotive Electronic Council))
- IEC(International Electrotechnical Commission)
- JEITA(Japan Electronics and Information Technology Industries Association)
| IC ESD Reference | MIL-STD | JEDEC | AECQ | Other |
|---|---|---|---|---|
| HBM (Human Body Mode) | MIL-STD-883 | JS-001 2017 | AEC-Q100-002 | |
| MM (Machine Mode) | JESD22-A115 | AEC-Q100-003 | ||
| SCDM (Socket CDM) | ANSI/ESD SP5.3.2 | |||
| CDM (Non-Socket) | JS002-2018 | AEC-Q100-011 | EIA/ESDA-5.3.1 |
| Latch-Up Reference | MIL-STD | JEDEC | AECQ | Other |
|---|---|---|---|---|
| Room Temp. Test | JESD-78 | |||
| High Temp. Test | JESD-78 | AEC-Q100-004 |
| System ESD Reference | MIL-STD | JEDEC | AECQ | Other |
|---|---|---|---|---|
| HBM (Human Body Mode) | AEC-Q200-002 | IEC61000-4-2 |
| HBM / MM / Latch Up | MK4 | MK2 | Zap Master | Zap Master HV |
|---|---|---|---|---|
| Pin Counts | 2304pin | 768pins | 256pins | 256pins |
| Voltage Supplies (Set) | 7 sets | 5 sets | 2 sets | 2 sets |
| ESD Ability | HBM = 8KV MM = 2KV |
|||
| Maximum V/I Current | 100V/18A | 30V/3A,100V/1A | 25V/1mA | 25V/1mA,125V/1mA |
| Maximum Discharge Rate | 10 Pulse/Sec. | 10 Pulse/Sec. | 3 Pulse/Sec | 3 Pulse/Sec |
| CDM / ESD Gun | CDM HANWA C5002 | ESD GUN Noiseken ESS-B3011 |
|---|---|---|
| ESD Ability | 0~4000V | Contact ± 30KV Air ± 30KV |
| Step Voltage | 5V | 500V |
HANWA CDM HED-C5000
iST exclusive JEITA CDM equipment testing in accordance with SONY standards
| CDM / ESD Gun | CDM HANWA C5002 | ESD GUN Noiseken ESS-B3011 |
|---|---|---|
| ESD Ability | 0~4000V | Contact ± 30KV Air ± 30KV |
| Step Voltage | 5V | 500V |
- Both IC devices and finished modules can be tested.